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arm64 - How do I decode a machine instruction to assembly in LEGv8?

source : stackoverflow.com

arm64 – How do I decode a machine instruction to assembly in LEGv8?

I am having trouble figuring out how a LEGv8 machine instruction is decoded. Assume the following binary:

1000 1011 0000 1111 0000 0000 0001 0011

I have the following chart that is supposed to help me decode:

The first 11 bits 10001011000 correspond to decimal 1112 and according to the chart this is the ADD instruction. So I know how to determine this part of the instruction (unless there is a better approach, maybe this won’t work for opcodes that aren’t 11 bits?). At this point I am confused on how to proceed.

I know that ADD is of instruction format R-format so the bits are layed out as below:

opcode: 11 bitsRm: 5 bitsshamt: 6 bitsRn: 5 bitsRd: 5 bits

I attempt to lay out the initial binary machine instruction knowing these field sizes…

opcode = 1000 1011 0000 1111 0000 0000 0001 0011 = 10001011000This is the first 11 bits of the initial binary machine instruction.

Rm = 1000 1011 0000 1111 0000 0000 0001 0011 = 01111This is the next 5 bits after the initial 11 bits for opcode.

shamt = 1000 1011 0000 1111 0000 0000 0001 0011 = 000000This is the next 6 bits after the 5 bits for Rm.

Rn = 1000 1011 0000 1111 0000 0000 0001 0011 = 00000This is the next 5 bits after the 6 bits for shamt.

Rd = 1000 1011 0000 1111 0000 0000 0001 0011 = 10011This is the last 5 bits in the binary machine instruction (the 5 bits after the 5 bits for Rn).

Converting binary to decimal for the Rm, Rn and Rd I get:

Rm = 15 = X15Rn = 0 = X0Rd = 19 = X19

Therefore my final answer to decoding the initial binary machine instruction to an assembly statement would be ADD X19, X0, X15

However the textbook answer where this example is from is ADD X16, X15, X5. Where did I go wrong?

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PDF ARMv8 A64 Quick Reference Conditional Instructions – Description. The andi. and andil. instructions logically AND the contents of general-purpose register (GPR) RS with the concatenation of x'0000' and a 16-bit unsigned integer, UI, and place the result in GPR RA.. The andi. and andil. instructions have one syntax form and never affect the Fixed-Point Exception Register. The andi. and andil. instructions copies the Summary Overflow (SO) bit fromThe LEGv8 assembly language is defined by the ARM edition of "Computer Organization and Design: The Hardware/Software Interface" by David A. Patterson and John L. Hennessy as a more approachable alternative to the full ARMv8 instruction set. The MIPS edition of that same book is used in the Computer Organization course at ASU.what is the LEGv8 instruction for adding b+c and saving the value into a? ADD a, b, c every arithmetic operation has 3 operands, following which design principle? principle 1: simplicity favors regularity

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